www.michael-herz.de

www.michael-herz.de

Contact:

Email: mail@michael-herz.de
Voice mail and fax: +49 941 5992 29371

Downloads:

M. Herz: Server Technology on the Move: Remote Control is Key; 3rd Agilent Technologies Remote Management Forum, Taipei, Taiwan, September 5, 2003 <HTML>

M. Herz: Blade Management Concepts with Agilent's High-End Remote Management Solutions; 2nd Agilent Technologies Remote Management Forum, Taipei, Taiwan, October 21, 2002 <HTML>

M. Herz, R. Hartenstein, M. Miranda, E.Brockmeyer, F. Catthoor: Memory Organization for Stram-based Reconfigurable Computing; 9th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2002), Dubrovnik, Croatia, September 15-18, 2002 <PDF>

M. Herz: Server Management Requirements and Implications on Server Motherboard Design; 1th Agilent Technologies Remote Management Forum, Taipei, Taiwan, March 5, 2002 <HTML>

M. Herz: High Performance Memory Communication Architectures for Coarse-grained Reconfigurable Computing Systems; Ph. D. Thesis, ISBN 3-925178-56-2, Germany, 2001 <HTML>

M. Herz: Remote System Mangement Principles; IEEE International Conference on Cluster Computing (CLUSTER 2000), Chemnitz, Germany, Nov. 28 - Dec. 2, 2000 <PDF>

M. Herz: Agilent's Key Technologies in Remote System Mangement; IEEE International Conference on Cluster Computing (CLUSTER 2000), Chemnitz, Germany, Nov. 28 - Dec. 2, 2000 <PDF>

R. Hartenstein, M. Herz, T. Hoffmann, U. Nageldinger: Generation of Design Suggestions for Coarse-Grain Reconfigurable Architectures; 10th International Workshop on Field Programmable Logic and Applications, FPL '2000 <PDF>

R. Hartenstein, M. Herz, T. Hoffmann, U. Nageldinger: Synthesis and Domain-specific Optimization of KressArray-based Reconfigurable Computing Engines; 8th ACM International Symposium on Field-Programmable Gate Arrays (FPGA 2000), Monterey, CA, USA, Feb. 9-11, 2000 <PDF>

R. Hartenstein, M. Herz, T. Hoffmann, U. Nageldinger: KressArray Xplorer: A New CAD Environment to Optimize Reconfigurable Datapath Array Architectures; Asia and South Pacific Design Automation Conference, ASP-DAC, Yokohama, Japan, Jan. 25.-28. 2000 <PDF>

R. Hartenstein, M. Herz, T. Hoffmann, U. Nageldinger: Mapping Applications onto reconfigurable KressArrays; 9th International Workshop on Field Programmable Logic and Applications, FPL '99, Glasgow, UK, Aug.30-Sept.2, 1999 <PDF>

R. Hartenstein, M. Herz, T. Hoffmann, U. Nageldinger: An Internet Based Development Framework for Reconfigurable Computing; 9th International Workshop on Field Programmable Logic and Applications, FPL '99, Glasgow, UK, Aug.30-Sept.2, 1999 <PDF>

M. Herz, T. Hoffmann, U. Nageldinger, C. Schreiber: Interfacing the MoM-PDA to an Internet-based Development System; Proc. of 32th Anual Hawaii Int. Conf. on System Science (HICSS-32), January, Hawaii, USA, 1999 <PDF>

M. Herz, T. Hoffmann, U. Nageldinger, C. Schreiber: XMDS: The Xputer Multimedia Development System; Proc. of 32th Anual Hawaii Int. Conf. on System Science (HICSS-32), January, Hawaii, USA, 1999 <PDF>

R. Hartenstein, M. Herz, T. Hoffmann, U. Nageldinger: Using the KressArray for Configurable Computing; Proceedings of SPIE Vol. 3526, Conference on Configurable Computing: Technology and Applications, Boston, USA, November 2-3, 1998 <PDF>

R. Hartenstein, M. Herz, F. Gilbert: Designing for Xilinx XC6200 FPGAs; Proceedings of 8th International Workshop on Field-Programmable Logic and Applications, FPL’98, Tallinn, Estonia, August 31- September 3, 1998.
Proceedings: Reiner W. Hartenstein, Adres Keevallik (Ed.), Lecture Notes in Computer Science 1482, Springer-Verlag, Germany, 1998 <PDF>

R. Hartenstein, M. Herz, T. Hoffmann, U. Nageldinger: Exploiting Contemporary Techniques in Reconfigurable Accelerators; Proceedings of 8th International Workshop on Field-Programmable Logic and Applications, FPL’98, Tallinn, Estonia, August 31- September 3, 1998.
Proceedings: Reiner W. Hartenstein, Adres Keevallik (Ed.), Lecture Notes in Computer Science 1482, Springer-Verlag, Germany, 1998 <PDF>

R. Hartenstein, M. Herz, T. Hoffmann, U. Nageldinger: On Reconfigurable Co-Processing Units; Proceedings of Reconfigurable Architectures Workshop (RAW98), held in conjunction with 12th International Parallel Processing Symposium (IPPS-98) and 9th Symposium on Parallel and Distributed Processing (SPDP-98), Orlando, Florida, USA, March 30,1998.
Proceedings: Jose Rolim (Ed.): Parallel and Distributed Processing, Lecture Notes in Computer Science 1388, Springer-Verlag, Germany, 1998 <PDF>

J. Becker, R. Hartenstein, M. Herz, U. Nageldinger: Parallelization in Co-Compilation for Configurable Accelerators; in proccedings of Asia and South Pacific Design Automation Conference, ASP-DAC’98, Yokohama, Japan, Feb. 10-13, 1998 <PDF>

R. Hartenstein, J. Becker, M. Herz, U. Nageldinger: A Novel Universal Sequencer Hardware; Proceedings of Fachtagung Architekturen von Rechensystemen ARCS'97, Rostock, Germany, September 8-11, 1997 <PDF>

R. Hartenstein, J. Becker, M. Herz, U. Nageldinger: An Innovative Platform for Embedded System Design; Proceedings of the Workshop Zielarchitekturen Eingebetteter Systeme, ZES‘97, in conjunction with the Fachtagung Architekturen von Rechensystemen ARCS'97, Rostock, Germany, September 11, 1997 <PDF>

R. Hartenstein, J. Becker, M. Herz, U. Nageldinger: Data Scheduling in Hardware/Software Co-Design for Field-programmable Accelerators; Proceedings of 7th International Workshop on Field Programmable Logic, FPL‘97, London, UK, September 1-3, 1997 <PDF>

R. Hartenstein, J. Becker, M. Herz, U. Nageldinger: An Embedded Accelerator for Real World Computing; Proceedings of IFIP International Conference on Very Large Scale Integration, VLSI‘97, Gramado, Brazil, August 26-29, 1997 <PDF>

R. Hartenstein, J. Becker, M. Herz, U. Nageldinger:A Novel Sequencer Hardware for Application Specific Computing; Proceedings of 11th International Conference on Application-specific systems, Architectures and Processors, ASAP‘97, Zurich, Switzerland, July 14-16, 1997 <PDF>

R. Hartenstein, J. Becker, M. Herz, U. Nageldinger: A General Approach in System Design Integrating Reconfigurable Accelerators; Proc. of IEEE 1996 Int’l. Conference on Innovative Systems in Silicon; Austin, Texas, USA, October 9-11, 1996 <PDF>

R. Hartenstein, J. Becker, M. Herz, R. Kress, U. Nageldinger: Co-Design and High Performance Computing: Scenes and Crisis; Proceedings of Reconfigurable Technology for Rapid Product Development & Computing, Part of SPIE’s International Symposium ‘96, Boston, USA, Nov. 1996 <PDF>

R. Hartenstein, J. Becker, M. Herz, R. Kress, U. Nageldinger: A Synthesis System for Bus-based Wavefront Array Architectures; Proceedings of ASAP 96 Application Specific Array Processors, Chicago, USA, August 1996 <PDF>

R. Hartenstein, J. Becker, M. Herz, R. Kress, U. Nageldinger: A Parallelizing Programming Environment for Embedded Xputer-based Accelerators; High Performance Computing Symposium ‘96, Ottawa, Canada, June 1996 <PDF>

R. Hartenstein, J. Becker, M. Herz, R. Kress, U. Nageldinger: A Partitioning Programming Environment for a Novel Parallel Architecture; 10th International Parallel Processing Symposium (IPPS), Honolulu, Hawaii, April 1996 <PDF>

ASIC Design Projects, 1994/1995 <HTML>

M. Herz: Server Technology on the Move: Remote Control is Key; 3rd Agilent Technologies Remote Management Forum, Taipei, Taiwan, September 5, 2003	<HTML>
M. Herz: Blade Management Concepts with Agilent's High-End Remote Management Solutions; 2nd Agilent Technologies Remote Management Forum, Taipei, Taiwan, October 21, 2002	<HTML>
M. Herz, R. Hartenstein, M. Miranda, E.Brockmeyer, F. Catthoor: Memory Organization for Stram-based Reconfigurable Computing; 9th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2002), Dubrovnik, Croatia, September 15-18, 2002	<PDF>
M. Herz: Server Management Requirements and Implications on Server Motherboard Design; 1th Agilent Technologies Remote Management Forum, Taipei, Taiwan, March 5, 2002	<HTML>
M. Herz: High Performance Memory Communication Architectures for Coarse-grained Reconfigurable Computing Systems; Ph. D. Thesis, ISBN 3-925178-56-2, Germany, 2001	<HTML>
M. Herz: Remote System Mangement Principles; IEEE International Conference on Cluster Computing (CLUSTER 2000), Chemnitz, Germany, Nov. 28 - Dec. 2, 2000	<PDF>
M. Herz: Agilent's Key Technologies in Remote System Mangement; IEEE International Conference on Cluster Computing (CLUSTER 2000), Chemnitz, Germany, Nov. 28 - Dec. 2, 2000	<PDF>
R. Hartenstein, M. Herz, T. Hoffmann, U. Nageldinger: Generation of Design Suggestions for Coarse-Grain Reconfigurable Architectures; 10th International Workshop on Field Programmable Logic and Applications, FPL '2000	<PDF>
R. Hartenstein, M. Herz, T. Hoffmann, U. Nageldinger: Synthesis and Domain-specific Optimization of KressArray-based Reconfigurable Computing Engines; 8th ACM International Symposium on Field-Programmable Gate Arrays (FPGA 2000), Monterey, CA, USA, Feb. 9-11, 2000	<PDF>
R. Hartenstein, M. Herz, T. Hoffmann, U. Nageldinger: KressArray Xplorer: A New CAD Environment to Optimize Reconfigurable Datapath Array Architectures; Asia and South Pacific Design Automation Conference, ASP-DAC, Yokohama, Japan, Jan. 25.-28. 2000	<PDF>
R. Hartenstein, M. Herz, T. Hoffmann, U. Nageldinger: Mapping Applications onto reconfigurable KressArrays; 9th International Workshop on Field Programmable Logic and Applications, FPL '99, Glasgow, UK, Aug.30-Sept.2, 1999	<PDF>
R. Hartenstein, M. Herz, T. Hoffmann, U. Nageldinger: An Internet Based Development Framework for Reconfigurable Computing; 9th International Workshop on Field Programmable Logic and Applications, FPL '99, Glasgow, UK, Aug.30-Sept.2, 1999	<PDF>
M. Herz, T. Hoffmann, U. Nageldinger, C. Schreiber: Interfacing the MoM-PDA to an Internet-based Development System; Proc. of 32th Anual Hawaii Int. Conf. on System Science (HICSS-32), January, Hawaii, USA, 1999	<PDF>
M. Herz, T. Hoffmann, U. Nageldinger, C. Schreiber: XMDS: The Xputer Multimedia Development System; Proc. of 32th Anual Hawaii Int. Conf. on System Science (HICSS-32), January, Hawaii, USA, 1999	<PDF>
R. Hartenstein, M. Herz, T. Hoffmann, U. Nageldinger: Using the KressArray for Configurable Computing; Proceedings of SPIE Vol. 3526, Conference on Configurable Computing: Technology and Applications, Boston, USA, November 2-3, 1998	<PDF>
R. Hartenstein, M. Herz, F. Gilbert: Designing for Xilinx XC6200 FPGAs; Proceedings of 8th International Workshop on Field-Programmable Logic and Applications, FPL’98, Tallinn, Estonia, August 31- September 3, 1998. Proceedings: Reiner W. Hartenstein, Adres Keevallik (Ed.), Lecture Notes in Computer Science 1482, Springer-Verlag, Germany, 1998	<PDF>
R. Hartenstein, M. Herz, T. Hoffmann, U. Nageldinger: Exploiting Contemporary Techniques in Reconfigurable Accelerators; Proceedings of 8th International Workshop on Field-Programmable Logic and Applications, FPL’98, Tallinn, Estonia, August 31- September 3, 1998. Proceedings: Reiner W. Hartenstein, Adres Keevallik (Ed.), Lecture Notes in Computer Science 1482, Springer-Verlag, Germany, 1998	<PDF>
R. Hartenstein, M. Herz, T. Hoffmann, U. Nageldinger: On Reconfigurable Co-Processing Units; Proceedings of Reconfigurable Architectures Workshop (RAW98), held in conjunction with 12th International Parallel Processing Symposium (IPPS-98) and 9th Symposium on Parallel and Distributed Processing (SPDP-98), Orlando, Florida, USA, March 30,1998. Proceedings: Jose Rolim (Ed.): Parallel and Distributed Processing, Lecture Notes in Computer Science 1388, Springer-Verlag, Germany, 1998	<PDF>
J. Becker, R. Hartenstein, M. Herz, U. Nageldinger: Parallelization in Co-Compilation for Configurable Accelerators; in proccedings of Asia and South Pacific Design Automation Conference, ASP-DAC’98, Yokohama, Japan, Feb. 10-13, 1998	<PDF>
R. Hartenstein, J. Becker, M. Herz, U. Nageldinger: A Novel Universal Sequencer Hardware; Proceedings of Fachtagung Architekturen von Rechensystemen ARCS'97, Rostock, Germany, September 8-11, 1997	<PDF>
R. Hartenstein, J. Becker, M. Herz, U. Nageldinger: An Innovative Platform for Embedded System Design; Proceedings of the Workshop Zielarchitekturen Eingebetteter Systeme, ZES‘97, in conjunction with the Fachtagung Architekturen von Rechensystemen ARCS'97, Rostock, Germany, September 11, 1997	<PDF>
R. Hartenstein, J. Becker, M. Herz, U. Nageldinger: Data Scheduling in Hardware/Software Co-Design for Field-programmable Accelerators; Proceedings of 7th International Workshop on Field Programmable Logic, FPL‘97, London, UK, September 1-3, 1997	<PDF>
R. Hartenstein, J. Becker, M. Herz, U. Nageldinger: An Embedded Accelerator for Real World Computing; Proceedings of IFIP International Conference on Very Large Scale Integration, VLSI‘97, Gramado, Brazil, August 26-29, 1997	<PDF>
R. Hartenstein, J. Becker, M. Herz, U. Nageldinger:A Novel Sequencer Hardware for Application Specific Computing; Proceedings of 11th International Conference on Application-specific systems, Architectures and Processors, ASAP‘97, Zurich, Switzerland, July 14-16, 1997	<PDF>
R. Hartenstein, J. Becker, M. Herz, U. Nageldinger: A General Approach in System Design Integrating Reconfigurable Accelerators; Proc. of IEEE 1996 Int’l. Conference on Innovative Systems in Silicon; Austin, Texas, USA, October 9-11, 1996	<PDF>
R. Hartenstein, J. Becker, M. Herz, R. Kress, U. Nageldinger: Co-Design and High Performance Computing: Scenes and Crisis; Proceedings of Reconfigurable Technology for Rapid Product Development & Computing, Part of SPIE’s International Symposium ‘96, Boston, USA, Nov. 1996	<PDF>
R. Hartenstein, J. Becker, M. Herz, R. Kress, U. Nageldinger: A Synthesis System for Bus-based Wavefront Array Architectures; Proceedings of ASAP 96 Application Specific Array Processors, Chicago, USA, August 1996	<PDF>
R. Hartenstein, J. Becker, M. Herz, R. Kress, U. Nageldinger: A Parallelizing Programming Environment for Embedded Xputer-based Accelerators; High Performance Computing Symposium ‘96, Ottawa, Canada, June 1996	<PDF>
R. Hartenstein, J. Becker, M. Herz, R. Kress, U. Nageldinger: A Partitioning Programming Environment for a Novel Parallel Architecture; 10th International Parallel Processing Symposium (IPPS), Honolulu, Hawaii, April 1996	<PDF>
ASIC Design Projects, 1994/1995	<HTML>